Stochastic Inner Product Core for Digital FIR Filters

The computational operations of stochastic computing (SC) are governed by probability rules which is different from conventional arithmetic computations. Applications of SC to digital signal and image processing problems have been recently reported in the literature. To improve the computational performance of SC based finite impulse response (FIR) digital filters, a new stochastic inner product (multiply and accumulate) core with an improved scaling scheme is presented for improving the accuracy and fault tolerance performance of the filters. Taking into account the symmetric property of the coefficients of linear phase FIR filters, the proposed inner product core is designed using tree structured multiplexers which is capable of reducing the critical path and fault propagation in the stochastic circuitry. The designed inner product core can lead to construction of SC based light weight and multiplierless FIR digital filters. As a result, an SC based FIR digital FIR filter is implemented on Altera Cyclone V FPGA which operates on stochastic sequences of 256-bits length (8-bits precision level). Experimental results show that the developed filter has lower hardware cost, better accuracy and higher fault tolerance level compared with other stochastic implementations. Key–Words: Stochastic computing, Inner product, Digital FIR filters